
300mA HIGH SPEED, EXTREMELY LOW NOISE CMOS LDO REGULATOR AP2128
Data Sheet
2
Sept. 2010 Rev. 2.0 BCD Semiconductor Manufacturing Limited
Shutdown
Figure 2. Pin Configuration of AP2128 (Top View)
Pin Configuration
K Package
(SOT-23-5)
V
IN
GND
V
OUT
ADJ/NC
Functional Block Diagram
Fixed Version
SHUTDOWN
GND
VIN
VOUT
Shutdown
and
Logic Control
Current Limint
And
Thermal
Protection
MOS Driver
V
REF
1
2
34
5
1
2
3
4
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